What you’ll learn
- Usage of Functional Coverage in Verification
- Implicit and Explicit Bins, Default bins
- Illegal bins, Ignore bins, WIldcard bins Default bins
- Covergroup, Sampling events, Reusable Covergroup
- Transition bins and Cross Coverage
- Usage of Functional Coverage in Verilog and SystemVerilog TB
- Demonstrations of Functional Coverage with Counters, Priority Encoders, Adders, FIFO, SPI and few other RTL’s
Requirements
- Fundamentals of Verilog
Who this course is for:
- Anyone interested in adopting Functional Coverage in the Verification process to generate Stimulus meeting Verification plans
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